FPGA NTSC Generator


Lately I’ve got my hands on this little toy:

It’s a 1981 vintage CRT camera viewfinder that has a huge resolution even if it’s very small. I had to modify it to make it work without the camera: I’ve added a voltage regulator for the 6V rail that was provided by the camera, and created a constant current sync for the CRT heater – oddly enough it seem to be also in the camera body.
the current limit is simple : a NMOS pass transistor , a 10K pull-up resistor from gate to VCC, a sense resistor from source to gnd and a BJT with collector to mosfet gate, emitter to ground and base to the sense resistor -> the entire think tries to keep 0.6V across the sense resistor. The filament current is at ~ 80mA – enough to make the CRT tube work with a very faint glow from the heater. The entire thing work from 9V and uses ~ 300mA

The video signal is generated from a FPGA module with the classic schematic of 2 resistors from the sync and data signals that form a divider with the 75 ohm viewfinder input.

For the FPGA i’ve used a Lattice brevia XP2 board that uses a LatticeXP2-5E 6TN144C device and a 128K by 8-bit 15ns SRAM :

The resulting NTSC signal was tuned for this specific display, resulting in a 450×280 resolution at a 10MHz video clock.
For a basic test I’ve converted a bmp to a .mem file and added it to the fpga.
The results are promising:

The image should be a “test pattern” but because of the downsizing and conversion it lost quite a lot of detail.
The viewfinder also has an optic zoom – so the 35mm CRT appears to fill the entire field of view. The optics are quite good but show a lot of edge distortions.

Now I’m trying to link the on board SRAM into the design and ad a spi like interface to write data.
Another update will be to add a rail to rail low voltage op-amp to buffer the output signal: the rise / fall time are not so good.
I’ll attach the verilog files once I get this part going.

Category: Electronica | Tags: , , ,
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